hardware:memorymap
Differences
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hardware:memorymap [2025/03/01 18:53] – [Audio Coprocessor] clyde | hardware:memorymap [2025/03/12 17:19] (current) – [System Control Registers] clyde | ||
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===== General Purpose RAM ===== | ===== General Purpose RAM ===== | ||
- | The lowest 8,196 addresses provide general-purpose data storage. Data stored in this range will only be read and written by the main processor, without side effects. | + | The lowest 8,192 addresses provide general-purpose data storage. Data stored in this range will only be read and written by the main processor, without side effects. |
Of special note within this section are the ranges $0000-$00FF, | Of special note within this section are the ranges $0000-$00FF, | ||
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| $2005 | Banking Register | | $2005 | Banking Register | ||
| $2007 | Video/ | | $2007 | Video/ | ||
- | | $2008 | Gamepad 1 (Left port) | | ||
- | | $2009 | Gamepad 2 (Right port) | | ||
- | |||
==== Audio Coprocessor === | ==== Audio Coprocessor === | ||
Line 91: | Line 88: | ||
The VIA is used to control the " | The VIA is used to control the " | ||
+ | ^ Addr ^ Use ^ | ||
+ | | $2800 | I/O Register B | | ||
+ | | $2801 | I/O Register A | | ||
+ | | $2802 | Data Direction Register B | | ||
+ | | $2803 | Data Direction Register A | | ||
+ | | $2804 | Timer 1 Low-Order Latches/ | ||
+ | | $2805 | Timer 1 High-Order Counter | | ||
+ | | $2806 | Timer 1 Low-Order Latches | | ||
+ | | $2807 | Timer 1 High-Order Latches | | ||
+ | | $2808 | Timer 2 Low-Order Latches/ | ||
+ | | $2809 | Timer 2 High-Order Counter | | ||
+ | | $280A | Shift Register | | ||
+ | | $280B | Auxiliary Control Register | | ||
+ | | $280C | Peripheral Control Register | ||
+ | | $280D | Interrupt Flag Register | ||
+ | | $280E | Interrupt Enable Register | | ||
+ | | $280F | Same as Reg 1 except no " | ||
+ | |||
+ | [[https:// | ||
===== Audio RAM ===== | ===== Audio RAM ===== | ||
hardware/memorymap.1740855236.txt.gz · Last modified: 2025/03/01 18:53 by clyde